1. Field of the Invention
The present invention generally relates to dielectric materials, and more particularly, the present invention relates to dielectric materials which include nano regions embedded therein. The dielectric materials may, for example, be utilized in the gate structure of a memory cell.
2. Description of the Related Art
The operating performance of a charge trap flash device can be enhanced by embedding metal-containing “nano crystals” or “nano dots” within the trapping layer of the charge trap flash device. As is understood in the art, the nano crystals or nano dots are effect in trapping charges, and have the functional advantage of being physically separated from one another to reduce charge leakage. In effect, such devices exhibit an enhance energy barrier which advantageously creates a “deep” charge trap. Examples include embedding nano regions of either metal (e.g., WN) or metal oxide (e.g., HfO2) within a layer of silicon dioxide.
However, the formation of a trapping layer containing nano crystals or nano dots is a relatively complex and expensive endeavor. In addition, care must be taken during the formation process to ensure that the nano crystals or nano dots are sufficiently isolated from one another.